-- $Id: $
-- File name:   TIMER.vhd
-- Created:     10/7/2010
-- Author:      Christopher Sakalis
-- Lab Section: 4
-- Version:     1.0  Initial Design Entry
-- Description: Timer Block.


LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity TIMER is
  port(
          CLK : in std_logic;
        RST_N : in std_logic;
       D_EDGE : in std_logic;  --I am not using the D_EDGE signal!!!!!!!
       RCVING : in std_logic;
 SHIFT_ENABLE : out std_logic);
end TIMER;

architecture BEHAVIORAL of TIMER is
  signal myCount, nextCount: std_logic_vector(3 downto 0);
   Begin
     StateReg : process (CLK, RST_N)
     begin
       if (RST_N = '0') then
         myCount <= (others => '0');
       elsif (CLK'event and CLK = '1') then
         myCount <= nextCount;
       end if;
     end process;

--This should be the next state logic
     process(myCount,RCVING,D_EDGE)
      begin
       if (CONV_INTEGER(myCount) = 7) then
         nextCount <= "0000";
       elsif (D_EDGE = '1') then
         nextCount <= "0100";
       elsif (RCVING = '1') then --start counting
         nextCount <= myCount + 1;
       else
         nextCount <= myCount;
       end if;
     end process;




--D_EDGE is a synchronous reset and is not necessarily the same reset state as the RST signal.

--Need an if statement to reset the  counter to a known state 
--        EdgeReg : process (CLK, D_EDGE)
--        begin
--          if (D_EDGE = '1') then
--            myCount <= (others => '0');
--          elsif (CLK'event and CLK = '1') then
--            myCount <= nextCount;
--          end if;
--        end process;


--      process(D_EDGE)
--       begin
--       --Default cases:
--        myCount <= nextCount;
--        case D_EDGE is
--           when '1' => myCount <= "0000";
--           when others => myCount <= nextCount;
--        end case;
--      end process;



     process(myCount)
      begin
      --Default cases:
       SHIFT_ENABLE <= '0';
       case CONV_INTEGER(myCount) is
          when 7 => SHIFT_ENABLE <= '1';
          when others => SHIFT_ENABLE <= '0';
       end case;

--         case D_EDGE is
--            when '1' => myCount <= "0000";
--            when others => myCount <= nextCount;
--         end case;

     end process;
end BEHAVIORAL;



